MC33596_10 Datasheet, PDF (57/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

Application Schematics
STROBE
CONFB
SEB
9.8
9.3
9.4
9.5
SCLK
MOSI
MISO
9.2
9.10
9.9
9.7
Figure 41. Digital Interface Timing Diagram in Configuration Mode
SEB
CONFB
STROBE
SCLK
(input)
MOSI
(output)
9.3
9.6
Figure 42. Digital Interface Timing Diagram in Receive Mode (DME = 1)
20 Application Schematics
Examples of application schematics are proposed for Receiver.
Note: The external pullup resistor set on SEB pin (R2) is not mandatory. Instead of R2, an external
pulldown resistor of 10 k may be connected between SEB pin and ground.
20.1 Receiver Schematics
Figure 43 and Figure 44 show the application schematic in receive mode for 3 V operation.
MC33596 Data Sheet, Rev. 4
Freescale Semiconductor
57