MC33596_10 Datasheet, PDF (18/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

Receive Mode
• State 10:
The receiver is off, but the strobe oscillator and the off counter are running. Forcing STROBE pin
to the low level maintains the system in this state.
• State 11:
The receiver is waiting for a valid ID. If an ID, or its complement, is detected, the state machine
advances to state 12; otherwise, the circuit goes back to state 10 at the end of the RON time, if
STROBE ≠ 1.
• State 12:
An ID or its complement has been detected. The data manager is now waiting for a header or its
complement. If neither a header, nor its complement, has been received before a time-out of 256
bits at data rate, the system returns to state 10.
• State 13:
A header, or its complement, has been received. Data and clock signals are output on the SPI port
until EOM indicates the end of the data sequence. If the complement of the header has been
received, output data are complemented also.
For all states: At any time, a low level applied to STROBE forces the circuit to state 10, and a low level
applied on CONFB forces the state machine to state 1, configuration mode.
When an EOM occurs before the current byte is fully shifted out, dummy bits are inserted until the number
of shifted bits is a multiple of 8.
MC33596 Data Sheet, Rev. 4
18
Freescale Semiconductor