MC33596_10 Datasheet, PDF (6/70 Pages) Freescale Semiconductor, Inc – PLL Tuned UHF Receiver for Data Transfer Applications

Power Supply
5 Power Supply
Table 3. Supply Voltage Range Versus Ambient Temperature
Parameter
Temperature Range¹
Symbol
Unit
–40°C to +85°C –20°C to +85°C
Supply voltage on VCCIN, VCCINOUT, VCCDIG for 3 V operation
Supply voltage on VCCIN for 5 V operation
NOTES:
1 _{–40°C to +85°C: MC33596FCE/FJE.}
–20°C to +85°C: MC33596FCAE/FJAE.
V_CC3V
V_CC5V
2.7 to 3.6
4.5 to 5.5
2.1 to 3.6
V
4.5 to 5.5
V
The circuit can be supplied from a 3 V voltage regulator or battery cell by connecting VCCIN,
VCCINOUT, and VCCDIG (See Figure 43 or Figure 44). It is also possible to use a 5 V power supply
connected to VCCIN; in this case VCCINOUT and VCCDIG should not be connected to VCCIN (See
Figure 41 or Figure 42).
An on-chip low drop-out voltage regulator supplies the RF and analog modules (except the strobe
oscillator and the low voltage detector, which are directly supplied from VCCINOUT). This voltage
regulator is supplied from pin VCCINOUT and its output is connected to VCC2OUT. An external
capacitor (C8 = 100 nF) must be inserted between VCC2OUT and GND for stabilization and decoupling.
The analog and RF modules must be supplied by VCC2 by externally wiring VCC2OUT to VCC2IN,
VCC2RF, and VCC2VCO.
A second voltage regulator supplies the digital part. This regulator is powered from pin VCCDIG and its
output is connected to VCCDIG2. An external capacitor (C10 = 100 nF) must be inserted between
VCCDIG2 and GNDDIG, for decoupling. The supply voltage VCCDIG2 is equal to 1.6 V. In standby
mode, this voltage regulator goes into an ultra-low-power mode, but VCCDIG2 = 0.7 × V_CCDIG.
This enables the internal registers to be supplied, allowing configuration data to be saved.
6 Supply Voltage Monitoring and Reset
At power-on, an internal reset signal (Power-on Reset, POR) is generated when supply voltage is around
1.3 V. All registers are reset.
When the LVDE bit is set, the low-voltage detection module is enabled. This block compares the supply
voltage on VCCINOUT with a reference level of about 1.8 V. If the voltage on VCCINOUT drops below
1.8 V, status bit LVDS is set. The information in status bit LVDS is latched and reset after a read access.
NOTE
If LVDE = 1, the LVD module remains enabled. The circuit cannot be put
in standby mode, but remains in LVD mode with a higher quiescent current,
due to the monitoring circuitry. LVD function is not accurate in standby
mode.
MC33596 Data Sheet, Rev. 4
6
Freescale Semiconductor