MC9S08QG8_09 Datasheet, PDF (78/314 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 5 Resets, Interrupts, and General System Control
5.8.10 System Power Management Status and Control 3 Register
(SPMSC3)
This high page register is used to report the status of the low voltage warning function and to select the
low voltage detect trip voltage.
7
6
5
4
3
2
1
0
R LVWF
0
0
0
0
0
LVDV
LVWV
W
LVWACK
POR:
0¹
0
0
0
0
0
0
0
LVD:
0¹
0
U
U
0
0
0
0
Any other
reset:
0¹
0
U
U
0
0
0
0
= Unimplemented or Reserved
U= Unaffected by reset
Figure 5-12. System Power Management Status and Control 3 Register (SPMSC3)
1 _{LVWF will be set in the case when VSupply transitions below the trip point or after reset and VSupply is already below VLVW.}
Table 5-14. SPMSC3 Register Field Descriptions
Field
Description
7
LVWF
6
LVWACK
5
LVDV
4
LVWV
Low-Voltage Warning Flag — The LVWF bit indicates the low voltage warning status.
0 Low voltage warning not present.
1 Low voltage warning is present or was present.
Low-Voltage Warning Acknowledge — The LVWF bit indicates the low voltage warning status. Writing a 1 to
LVWACK clears LVWF to a 0 if a low voltage warning is not present.
Low-Voltage Detect Voltage Select — The LVDV bit selects the LVD trip point voltage (V_LVD).
0 Low trip point selected (V_LVD = V_LVDL).
1 High trip point selected (V_LVD = V_LVDH).
Low-Voltage Warning Voltage Select — The LVWV bit selects the LVW trip point voltage (V_LVW).
0 Low trip point selected (V_LVW = V_LVWL).
1 High trip point selected (V_LVW = V_LVWH).
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
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