MC9S08QG8_09 Datasheet, PDF (69/314 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 5 Resets, Interrupts, and General System Control
5.8.1 Interrupt Pin Request Status and Control Register (IRQSC)
This direct page register includes status and control bits, which are used to configure the IRQ function,
report status, and acknowledge IRQ events.
1
7
6
5
R
0
IRQPDD
0
W
4
IRQPE
3
IRQF
2
0
IRQACK
1
IRQIE
0
IRQMOD
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 5-2. Interrupt Request Status and Control Register (IRQSC)
1 _{Bit 5 is a reserved bit that must always be written to 0.}
Table 5-3. IRQSC Register Field Descriptions
Field
Description
6
IRQPDD
4
IRQPE
3
IRQF
2
IRQACK
1
IRQIE
0
IRQMOD
Interrupt Request (IRQ) Pull Device Disable — This read/write control bit is used to disable the internal pullup
device when the IRQ pin is enabled (IRQPE = 1) allowing for an external device to be used.
0 IRQ pull device enabled if IRQPE = 1.
1 IRQ pull device disabled if IRQPE = 1.
IRQ Pin Enable — This read/write control bit enables the IRQ pin function. When this bit is set the IRQ pin can
be used as an interrupt request.
0 IRQ pin function is disabled.
1 IRQ pin function is enabled.
IRQ Flag — This read-only status bit indicates when an interrupt request event has occurred.
0 No IRQ request.
1 IRQ event detected.
IRQ Acknowledge — This write-only bit is used to acknowledge interrupt request events (write 1 to clear IRQF).
Writing 0 has no meaning or effect. Reads always return 0. If edge-and-level detection is selected (IRQMOD = 1),
IRQF cannot be cleared while the IRQ pin remains at its asserted level.
IRQ Interrupt Enable — This read/write control bit determines whether IRQ events generate an interrupt
request.
0 Interrupt request when IRQF set is disabled (use polling).
1 Interrupt requested whenever IRQF = 1.
IRQ Detection Mode — This read/write control bit selects either edge-only detection or edge-and-level
detection. See Section 5.5.2.2, “Edge and Level Sensitivity,” for more details.
0 IRQ event on falling edges only.
1 IRQ event on falling edges and low levels.
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor
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