MC9S08QG8_09 Datasheet, PDF (145/314 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 10
Internal Clock Source (S08ICSV1)
10.1 Introduction
The internal clock source (ICS) module provides clock source choices for the MCU. The module contains
a frequency-locked loop (FLL) as a clock source that is controllable by either an internal or an external
reference clock. The module can provide this FLL clock or either of the internal or external reference
clocks as a source for the MCU system clock. There are also signals provided to control a low power
oscillator (XOSC) module to allow the use of an external crystal/resonator as the external reference clock.
Whichever clock source is chosen, it is passed through a reduced bus divider (BDIV) which allows a lower
final output clock frequency to be derived.
The bus frequency will be one-half of the ICSOUT frequency.
NOTE
The external reference clock is not available on all packages. See Table 1-1
for external clock availability for each package option.
10.1.1 Module Configuration
When the internal reference is enabled in stop mode (IREFSTEN = 1), the voltage regulator must also be
enabled in stop mode by setting the LVDE and LVDSE bits in the SPMSC1 register.
On this MCU, the internal reference is not connected to any module that is operational in stop mode.
Therefore, the IREFSTEN bit in the ICSC1 register should always be cleared.
Figure 10-1 shows the MC9S08QG8/4 block diagram with the ICS highlighted.
10.1.2 Factory Trim Value
A factory trim value is stored in FLASH during production testing. To be used, this value must be copied
from FLASH memory to the ICSTRM register. A factory value for this FTRIM bit is also stored in FLASH
and must be copied into the FTRIM bit in the ICSSC register. See Table 4-4 for the FLASH locations of
the factory ICSTRM and FTRIM values.
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor
143