MC9S08QG8_09 Datasheet, PDF (157/314 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 11
Inter-Integrated Circuit (S08IICV1)
11.1 Introduction
The inter-integrated circuit (IIC) provides a method of communication between a number of devices. The
interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is
capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are limited by a
maximum bus capacitance of 400 pF.
11.1.1 Module Configuration
The IIC module pins, SDA and SCL can be repositioned under software control using IICPS in SOPT2 as
as shown in Table 11-1. IICPS in SOPT2 selects which general-purpose I/O ports are associated with IIC
operation.
Table 11-1. IIC Position Options
IICPS in SOPT2
0 (default)
1
Port Pin for SDA
PTA2
PTB6
Port Pin for SCL
PTA3
PTB7
Figure 11-1 is the MC9S08QG8/4 block diagram with the IIC block highlighted.
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor
155