MC908AP16CFAE Datasheet, PDF (67/324 Pages) Freescale Semiconductor, Inc – Table of Contents

Table 4-1. Instruction Set Summary
Source
Form
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
STX opr,SP
STX opr,SP
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
SUB opr,SP
SUB opr,SP
SWI
TAP
TAX
TPA
TST opr
TSTA
TSTX
TST opr,X
TST ,X
TST opr,SP
TSX
TXA
TXS
WAIT
Operation
Description
Effect on
CCR
VH I NZC
Store X in M
M ← (X)
DIR
EXT
IX2
0 – – o o – IX1
IX
SP1
SP2
Subtract
A ← (A) – (M)
IMM
DIR
EXT
o
–
–
o
o
o
IX2
IX1
IX
SP1
SP2
Software Interrupt
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
SP ← (SP) – 1; I ← 1
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
– – 1 – – – INH
Transfer A to CCR
CCR ← (A)
o o o o o o INH
Transfer A to X
X ← (A)
– – – – – – INH
Transfer CCR to A
A ← (CCR)
– – – – – – INH
Test for Negative or Zero
(A) – $00 or (X) – $00 or (M) – $00
DIR
INH
0
–
–
o
o
–
INH
IX1
IX
SP1
Transfer SP to H:X
H:X ← (SP) + 1
– – – – – – INH
Transfer X to A
A ← (X)
– – – – – – INH
Transfer H:X to SP
(SP) ← (H:X) – 1
– – – – – – INH
Enable Interrupts; Wait for Interrupt
I ← 0; Inhibit CPU clocking until
interrupted
– – 0 – – – INH
Opcode Map
BF dd 3
CF hh ll 4
DF ee ff 4
EF ff
3
FF
2
9EEF ff
4
9EDF ee ff 5
A0 ii
2
B0 dd 3
C0 hh ll 4
D0 ee ff 4
E0 ff
3
F0
2
9EE0 ff
4
9ED0 ee ff 5
83
9
84
2
97
1
85
1
3D dd 3
4D
1
5D
1
6D ff
3
7D
2
9E6D ff
4
95
2
9F
1
94
2
8F
1
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
67