MC908AP16CFAE Datasheet, PDF (161/324 Pages) Freescale Semiconductor, Inc – Table of Contents

Functional Description
the received byte can be read. If the SCI receive interrupt enable bit, SCRIE, in SCC2 is also set, the
SCRF bit generates a receiver CPU interrupt request.
INTERNAL BUS
SCIBDSRC
FROM
CONFIG2
CGMXCLK
BUS CLOCK
A
B
SL
X
SL = 0 => X = A
SL = 1 => X = B
SCP1
SCP0
÷4
PRE- BAUD
SCALER DIVIDER
SCR1
SCR2
SCR0
÷ 16
RxD
BKF
RPF
DATA
RECOVERY
ALL 0s
SCI DATA REGISTER
11-BIT
RECEIVE SHIFT REGISTER
H876543210L
M
WAKE
ILTY
WAKEUP
LOGIC
SCRF
RWU
IDLE
PEN
PARITY
PTY
CHECKING
IDLE
ILIE
DMARE
SCRF
SCRIE
DMARE
SCRF
SCRIE
DMARE
OR
ORIE
NF
NEIE
FE
FEIE
PE
PEIE
Figure 11-5. SCI Receiver Block Diagram
R8
ILIE
SCRIE
DMARE
OR
ORIE
NF
NEIE
FE
FEIE
PE
PEIE
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
161