MC908AP16CFAE Datasheet, PDF (38/324 Pages) Freescale Semiconductor, Inc – Table of Contents

Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$005A
ADC Data Register Low 0 ^Read:
(ADRL0) _Write:
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
ADx
R
Reset: 0
0
0
0
0
0
0
0
$005B
ADC Data Register Low 1 ^Read:
(ADRL1) _Write:
AD9
R
AD8
R
AD7
R
AD6
R
AD5
R
AD4
R
AD3
R
AD2
R
Reset: 0
0
0
0
0
0
0
0
$005C ADC Data Register Low 2 ^{Read: AD9}
AD8
AD7
AD6
AD5
AD4
AD3
AD2
(ADRL2) _Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
$005D
ADC Data Register Low 3 ^Read:
(ADRL3) _Write:
AD9
R
AD8
R
AD7
R
AD6
R
AD5
R
AD4
R
AD3
R
AD2
R
Reset: 0
0
0
0
0
0
0
0
$005E
ADC Auto-scan Control ^Read:
Register Write:
AUTO1 AUTO0 ASCAN
(ADASCR) _Reset:
0
0
0
0
0
0
0
0
Read:
$005F
Unimplemented Write:
Reset:
Read:
$FE00
SIM Break Status Register
(SBSR)
Write:
R
R
Reset:
Note: Writing a logic 0 clears SBSW.
Read: POR
PIN
$FE01
SIM Reset Status Register
(SRSR)
Write:
Reset: 1
0
$FE02
Read:
R
R
Reserved Write:
Reset:
SIM Break Flag Control Reg- ^Read: _BCFE
R
$FE03
ister Write:
(SBFCR) _Reset:
0
Read: IF6
IF5
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
Reset: 0
0
Read: IF14
IF13
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
Reset: 0
0
U = Unaffected
X = Indeterminate
SBSW
R
R
R
R
R
Note
0
COP
ILOP
ILAD MODRST LVI
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
R
R
R
R
IF4
IF3
IF2
R
R
R
0
0
0
IF12
IF11
IF10
R
R
R
0
0
0
= Unimplemented
IF1
0
0
R
R
R
0
0
0
IF9
IF8
IF7
R
R
R
0
0
0
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 8 of 9)
MC68HC908AP Family Data Sheet, Rev. 4
38
Freescale Semiconductor