MC908AP16CFAE Datasheet, PDF (213/324 Pages) Freescale Semiconductor, Inc – Table of Contents

INTERNAL BUS
Functional Description
CGMOUT ÷ 2
FROM SIM
÷2
CLOCK ^{÷ 8}
DIVIDER _{÷ 32}
÷ 128
TRANSMIT DATA REGISTER
SHIFT REGISTER
76543210
RECEIVE DATA REGISTER
SPMSTR SPE
CLOCK
SELECT
SPR1 SPR0
CLOCK
LOGIC
PIN
CONTROL
LOGIC
M
S
SPMSTR CPHA CPOL
MISO
MOSI
SPSCK
SS
RESERVED
TRANSMITTER CPU INTERRUPT REQUEST
RESERVED
RECEIVER/ERROR CPU INTERRUPT REQUEST
SPI
CONTROL
MODFEN
ERRIE
SPTIE
SPRIE
R
SPE
SPWOM
SPRF
SPTE
OVRF
MODF
Figure 13-2. SPI Module Block Diagram
MASTER MCU
SLAVE MCU
SHIFT REGISTER
BAUD RATE
GENERATOR
MISO
MOSI
SPSCK
SS
MISO
MOSI
SPSCK
SS
V_DD
SHIFT REGISTER
Figure 13-3. Full-Duplex Master-Slave Connections
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
211