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MC908AP16CFAE Datasheet, PDF (310/324 Pages) Freescale Semiconductor, Inc – Table of Contents
Electrical Specifications
Table 22-13. MMIIC Interface Input/Output Signal Timing
Characteristic
Symbol Min Typ Max Unit
Comments
Operating frequency
fSMB
10
—
100 kHz MMIIC operating frequency
Bus free time
tBUF
4.7
—
—
µs
Bus free time between STOP and
START condition
Repeated start hold time.
tHD.STA
4.0
—
Hold time after (repeated) START
—
µs condition. After this period, the first
clock is generated.
Repeated start setup time.
tSU.STA
4.7
—
—
µs Repeated START condition setup time.
Stop setup time
tSU.STO
4.0
—
—
µs Stop condition setup time.
Hold time
tHD.DAT
300
—
—
ns Data hold time.
Setup time
tSU.DAT
250
—
—
ns Data setup time.
Clock low time-out
tTIMEOUT
25
—
35
ms Clock low time-out.(1)
Clock low
tLOW
4.7
—
—
µs Clock low period
Clock high
tHIGH
4.0
—
—
µs Clock high period.(2)
Slave clock low extend time
tLOW.SEXT
—
—
Cumulative clock low extend time (slave
25
ms device)(3)
Master clock low extend time
tLOW.MEXT
—
—
Cumulative clock low extend time
10
ms (master device) (4)
Fall time
tF
—
—
300
ns Clock/Data Fall Time(5)
Rise time
tR
—
—
1000
ns Clock/Data Rise Time(5)
1. Devices participating in a transfer will timeout when any clock low exceeds the value of TTIMEOUT min. of 25ms. Devices
that have detected a timeout condition must reset the communication no later than TTIMEOUT max of 35ms. The maximum
value specified must be adhered to by both a master and a slave as it incorporates the cumulative limit for both a master
(10 ms) and a slave (25 ms).
Software should turn-off the MMIIC module to release the SDA and SCL lines.
2. THIGH MAX provides a simple guaranteed method for devices to detect the idle conditions.
3. TLOW.SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start
to the stop. If a slave device exceeds this time, it is expected to release both its clock and data lines and reset itself.
4. TLOW.MEXT is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as
defined from start-to-ack, ack-to-ack, or ack-to-stop.
5. Rise and fall time is defined as follows: TR = (VILMAX – 0.15) to (VIHMIN + 0.15), TF = 0.9×VDD to (VILMAX – 0.15).
MC68HC908AP Family Data Sheet, Rev. 4
308
Freescale Semiconductor