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K10P81M100SF2 Datasheet, PDF (43/60 Pages) Freescale Semiconductor, Inc – K10 Sub-Family Data Sheet
Peripheral operating requirements and behaviors
Table 29. 12-bit DAC operating behaviors (continued)
Symbol
SR
Description
Slew rate -80h→ F7Fh→ 80h
• High power (SPHP)
• Low power (SPLP)
Min.
1.2
0.05
Typ.
1.7
0.12
Max.
—
—
Unit
V/μs
Notes
CT
Channel to channel cross talk
—
—
-80
dB
BW 3dB bandwidth
kHz
• High power (SPHP)
550
—
—
• Low power (SPLP)
40
1. Settling within ±1 LSB
2. The INL is measured for 0+100mV to VDACR−100 mV
3. The DNL is measured for 0+100 mV to VDACR−100 mV
4. The DNL is measured for 0+100mV to VDACR−100 mV with VDDA > 2.4V
5. Calculated by a best fit curve from VSS+100 mV to VREF−100 mV
i—na— ry
Prelim
Figure 13. Typical INL error vs. digital code
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
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