K10P81M100SF2 Datasheet, PDF (20/60 Pages) Freescale Semiconductor, Inc – K10 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
6.1.1 Debug trace timing specifications
Table 10. Debug trace operating behaviors
Symbol Description
Min.
Max.
Unit
T_cyc
Clock period
Frequency dependent
MHz
T_wl
Low pulse width
2
—
ns
T_wh
High pulse width
2
—
ns
T_r
Clock and data rise time
—
3
ns
T_f
Clock and data fall time
—
3
ns
T_s
Data setup
T_h
Data hold
3
—
ns
inary ²
—
ns
TRACE_CLKOUT
TRACE_D[3:0]
Figure 3. TRACE_CLKOUT specifications
lim ^Ts
Th
Ts
Th
Pre ^{Figure 4. Trace data specifications}
6.1.2 JTAG electricals
Symbol
J1
J2
Table 11. JTAG electricals
Description
Operating voltage
Min.
2.7
TCLK frequency of operation
• JTAG and CJTAG
0
• Serial Wire Debug
0
TCLK cycle period
1/J1
Table continues on the next page...
Max.
3.6
25
50
—
Unit
V
MHz
ns
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
20
Preliminary
Freescale Semiconductor, Inc.