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K10P81M100SF2 Datasheet, PDF (38/60 Pages) Freescale Semiconductor, Inc – K10 Sub-Family Data Sheet
Peripheral operating requirements and behaviors
Table 24. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Symbol Description
Conditions1
Min.
Typ.2
Max.
Unit
Notes
EIL
Input leakage er‐
ror
IIn × RAS
mV
IIn = leak‐
age cur‐
rent
(refer to
the MCU's
voltage
and cur‐
rent oper‐
Temp sensor
slope
• –40°C to 25°C
• 25°C to 105°C
ating rat‐
ings)
—
TBD
—
mV/°C
—
TBD
—
mV/°C
y VTEMP25 Temp sensor
r voltage
25°C
—
TBD
—
mV
1. All accuracy numbers assume the ADC is calibrated with VREFH = VDDA
a 2. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
in 3. 1 LSB = (VREFH - VREFL)/2N
4. Input data is 1 kHz sine wave.
6.6.1.3
Symbol
VDDA
VREFPGA
VADIN
RPGA
16-bit ADC with PGA operating conditions
lim Table 25. 16-bit ADC with PGA operating conditions
Description
Conditions
Supply voltage Absolute
e PGA ref voltage
Min.
Typ.1
Max.
Unit
1.71
—
3.6
V
VREFOUT VREFOUT VREFOUT
V
r Input voltage
Input impedance Gain = 1, 2, 4, 8
PGain = 16, 32
VSSA
—
VDDA
V
TBD
64
TBD
kΩ
TBD
32
TBD
Notes
2, 3
Gain = 64
TBD
16
TBD
RPGAD
Differntial input
impedance
Gain = 1, 2, 4, 8
Gain = 16, 32
Gain = 64
TBD
128
TBD
kΩ
TBD
64
TBD
TBD
32
TBD
IN+ to IN-
RAS Analog source Gain = 16, 32
resistance
—
100
—
Ω
4
TS
ADC sampling Gain = 64
time
1.25
—
—
µs
5
1. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 6 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. ADC must be configured to use the internal voltage reference (VREFOUT)
3. PGA reference connected to the VREFOUT pin. If the user wishes to drive VREFOUT with a voltage other than the output
of the VREF module, the VREF module must be disabled.
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
38
Preliminary
Freescale Semiconductor, Inc.