K10P81M100SF2 Datasheet, PDF (31/60 Pages) Freescale Semiconductor, Inc – K10 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
The following timing numbers indicate when data is latched or driven onto the external
bus, relative to the Flexbus output clock (FB_CLK). All other timing relationships can be
derived from these values.
Table 22. Flexbus switching specifications
Num Description
Min.
Max.
Unit
Notes
Operating voltage
2.7
3.6
V
Frequency of operation
—
50
Mhz
FB1
Clock period
20
—
ns
FB2
Address, data, and control output valid
FB3
Address, data, and control output hold
FB4
Data and FB_TA input setup
y _FB5
Data and FB_TA input hold
TBD
11.5
ns
1
0
—
ns
1
8.5
—
ns
2
0.5
—
ns
2
r _{1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], and FB_TS.}
2. Specification is valid for all FB_AD[31:0] and FB_TA.
a _FB1
in ^FB_CLK
FB_A[Y]
FB_D[X]
FB_RW
FB_TS
FB5
FB3
FB2
lim ^Address
Address
FB4
Data
Pre ^AA=1
FB_CSn
AA=0
FB_OEn
FB_BE/BWEn
FB_TA
FB4
AA=1
AA=0
FB5
FB_TSIZ[1:0]
TSIZ
Figure 10. FlexBus read timing diagram
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
31