FMS7401 Datasheet, PDF (63/80 Pages) Fairchild Semiconductor – Digital Power Controller

PRODUCT SPECIFICATION
VCC
RESET
LOAD (G3)
CLOCK
(G1)
SHIFT_IN (G4)
SHIFT_OUT (G2)
(in write mode)
SHIFT_OUT (G2)
(in read mode)
T_RESET
Figure 20. Programming Protocol
A
3 o e 2 k u cl c p ls s
T_LOAD1 T_LOAD2
1 1 01 00 1 01 1
bit 31
bit 30
bit 0
10-bit Opcode = 0x34B
A: start of programming e cycl
FMS7401/7401L
T_READY
T_LOAD3
A TLOAD4
BUSY low by
nd o e 2 k u cl c p ls
BUSY
bit 31
READY
Figure 21. Serial Data Timing¹
T_HI
T_LO
CLOCK (G1)
T_DIS
T_DIH
SHIFT_IN (G4)
Valid
T_DOS
T_DOH
SHIFT_OUT (G2)
Valid
LOAD
32-bit Command = Page Write
SHIFT_IN
from address 0xC00
0x90
PageWr
0x00
0x00
Page 0
Byte 1
(First)
CLOCK
32 Clock
Cycles
SHIFT_OUT
Figure 22. Page Mode Protocol
Page 0
Byte 2
8 Clock
Cycles
Page 0
Byte 3
8 Clock
Cycles
Continue with
Next Bytes in
the Page
Page 0
Byte 16
(Last)
8 Clock
Cycles
Check Ready/Busy
32-bit Command = Page Write
from address 0xC10
0x90
PageWr
0x00
0x10
Page 1
Byte 1
(First)
32 Clock
Cycles
Page Write
Ready
REV. 1.0.2 6/23/04
63