FMS7401 Datasheet, PDF (60/80 Pages) Fairchild Semiconductor – Digital Power Controller

FMS7401/7401L
PRODUCT SPECIFICATION
12 In-circuit Programming Specification
The FMS7401/7401L supports in-circuit programming of all internal memory mapped registers including the data EEPROM, code
EEPROM, and initialization registers. In-circuit programming consists of a 4-wire serial interface used to place the device in pro-
gramming mode and issue all programming commands.¹ The external programmer should follow the device pinout¹ defined in Fig-
ure 19 and the timing rules defined by the parameters listed in Table 31 as shown in Figure 20 and Figure 21.
Figure 19. Programming Mode Pin Configurations
SHIFT_IN 1
GND 2
SHIFT_OUT 3
CLOCK 4
8 VCC
7 NC/VCC
6 NC
5 _LOAD
FMS7401L 8-Pin PDIP/SOIC
NC/VCC 1
VCC 2
SHIFT_IN 3
GND 4
8 NC
7 LOAD
6 CLOCK
5 _{SHIFT_OUT}
FMS7401L 8-Pin TSSOP
SHIFT_IN 1
NC 2
GND 3
NC 4
NC 5
SHIFT_OUT 6
CLOCK 7
14 VCC
13 NC/VCC
12 NC/VCC
11 _RESET
10 NC
9 LOAD
8 _NC/GND
SHIFT_IN 1
NC 2
GND 3
NC 4
NC 5
SHIFT_OUT 6
CLOCK 7
14 _VCC
13 _VDD
12 _NC/VCC
11 _RESET
10 NC
9 LOAD
8 _AGND
FMS7401L 14-Pin PDIP/SOIC/TSSOP
FMS7401 14-Pin PDIP/SOIC/TSSOP
Table 32. Programming Interface Electrical Characteristics²
Symbol
Parameter
Conditions
THI
TLO
TDIS
TDIH
TDOS
TDOH
TACCESS
TLOAD1, TLOAD2,
TLOAD3, TLOAD4
TREADY
TRESET
CLOCK high time
CLOCK low time
SHIFT_IN setup time
SHIFT_IN hold time
SHIFT_OUT setup time
SHIFT_OUT hold time
SHIFT_OUT sample time
Loading time
EEPROM write time
System Reset time
25 °C
25 °C
25 °C
25 °C
25 °C
25 °C
25 °C
25 °C
25 °C
25 °C
Min.
500
500
100
100
100
900
500
5
Typ.
3.7
3.7
Max.
DC
DC
DC
Units
nS
nS
nS
nS
nS
nS
nS
µS
mS
mS
12.1 Programming Mode Interface
In order to place the device in programming mode, a 10-bit opcode (0x34B) must be shifted into the device during its system
reset. A system reset may be triggered during the device power-up by the Power-on Reset circuit or with the device already
powered with a low pulse on the device RESET pin.³ After power-up, the external programmer must shift in the 10-bit opcode
before the system reset sequence completes. If the correct opcode is shifted, the device will automatically enter programming
mode once the system reset sequence has completed.
The 10-bit opcode is serially shifted with the most significant bit (MSB) first into the device through the SHIFT_IN pin. Each
opcode data bit must be valid by TDIS before the rising edge of CLOCK. As the opcode is shifted, the current 10-bit pattern is
compared against 0x34B. If the 10-bit pattern is a match, the device will set the program mode flag and the device will enter
programming mode once the system reset sequence completes (see Figure 20).
60
REV. 1.0.2 6/23/04