FMS7401 Datasheet, PDF (3/80 Pages) Fairchild Semiconductor – Digital Power Controller

PRODUCT SPECIFICATION
FMS7401/7401L
FMS7401/7401L Pin Definitions
Pin Number
8-Pin
14-Pin
PDIP
SOIC
TSSOP
PDIP
SOIC
TSSOP
1
3
1
2
4
3
3
5
6
4
6
7
5
7
9
6
8
10
7
1
12
8
2
14
–
–
2
–
–
4
–
–
5
–
–
8
–
–
11
–
–
13
Pin Name
G4/AIN0
GND
G2/AIN2
G1/AIN3/
ADSTROBE
G3/AIN1
G0/
T1HS1
G5/
T1HS2
VCC
SR_GND
G6/-A IN
G7/AIN4/
AOUT
AGND
RESET
VDD
Pin Function Description
General purpose I/O port (bit 4 of the I/O configuration registers).
AIN0 analog input of the ADC (autozero amplifier’s positive terminal).
Programmable Comparator non-inverting input, if COMPSEL=0.
Digital ground pin.
General purpose I/O port (bit 2 of the I/O configuration registers).
AIN2 analog input of the ADC.
Programmable Comparator non-inverting input, if COMPSEL=1.
General purpose I/O port (bit 1 of the I/O configuration registers).
AIN3 analog input of the ADC.
External digital clock input.
PWM Timer 1’s ADSTROBE output.
General purpose I/O port (bit 3 of the I/O configuration registers).
AIN1 analog input of the ADC.
Internal current source generator pin.
General purpose I/O port (bit 0 of the I/O configuration registers).
PWM Timer 1’s T1HS1 output.
General purpose I/O port (bit 5 of the I/O configuration registers).
PWM Timer 1’s T1HS2 output.
Supply voltage input for the FMS7401L. In the FMS7401, Vcc is the regulated output.
AIN0 analog input of the ADC (autozero amplifier’s negative terminal). SR_GND is
internally connected to GND in the 8-pin FMS7401L.
General purpose I/O port (bit 6 of the I/O configuration registers).
Uncommitted amplifier negative analog input.
General purpose I/O port (bit 7 of the I/O configuration registers).
AIN4 analog input of the ADC.
Uncommitted amplifier analog output.
Analog ground for the FMS7401. In the FMS7401L, AGND is internally connected to
GND. Externally, AGND should be left unconnected or connected to GND.
Active low external reset input.
High voltage supply input for the FMS7401. In the FMS7401L, VCC is internally
connected to VDD. Externally, VDD should either be left unconnected or connected to
VCC.
REV. 1.0.2 6/23/04
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