FMS7401 Datasheet, PDF (46/80 Pages) Fairchild Semiconductor – Digital Power Controller

FMS7401/7401L
PRODUCT SPECIFICATION
The MIW circuit can be used with the I/O ports configured as both an input and output. The MIW configuration and function is
the same for both I/O configurations. However, when using the MIW circuit to wake the device from Halt/Idle Mode the
wakeup I/O port must be configured as an input, otherwise the device will never exit the mode.
Table 22. Multi-input Wakeup (MIW) Register Bit Assignments
Bit 7
G7⁵
Bit 6
PWMOFF⁶/G6⁵
WKEN, WKEDG, WKPND Registers (addr. 0xB1, 0xAF, 0xB0)
Bit 5
Bit 4
Bit 3
Bit 2
G5
G4
G3
G2
Figure 16. Multi-input Wakeup (MIW) Block Diagram⁶
Bit 1
G1
Bit 0
G0
Data Bus
PWMOFF
G6
B
Y
A _Sel
G7
G0
PWMINT
7
0
WKEN[7:0]
WKEDG[7:0]
7
0
WKPND[7:0]
WKINTEN
WAKEOUT
EDGEI
1. Refer to the Power Saving Modes section of the datasheet for detail regarding Halt and Idle Mode.
2. Refer to Table 30 of the Device Memory section of the datasheet for the detailed memory map.
3. Hardware interrupts are not executed by the microcontroller core unless the Global Interrupt enable (G) flag of the Status register is set. Refer to the 8-Bit
Microcontroller Core section of the datasheet for details.
4. No other hardware interrupts will be executed, aside from the software interrupt instruction, until the MIW hardware interrupt is no longer executed. Refer to the
8-Bit Microcontroller Core section of the datasheet for details.
5. Available only on the 14-pin package option.
6. The PWMOFF and PWMINT signals are the outputs from the Programmable Comparator’s Digital Filter circuit. Refer to Programmable Comparator Circuit section
of the datasheet for details.
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REV. 1.0.2 6/23/04