FMS7401 Datasheet, PDF (43/80 Pages) Fairchild Semiconductor – Digital Power Controller

PRODUCT SPECIFICATION
FMS7401/7401L
8 I/O Ports
The eight I/O pins (six on the 8-pin package option) are bi-directional (see Figure 14). The bi-directional I/O pins can be indi-
vidually configured by software to operate as high-impedance inputs, as inputs with weak pull-up, or as push-pull outputs. The
operating state is determined by the contents of the corresponding bits in the data and configuration registers. Each bi-direc-
tional I/O pin can be used for general purpose I/O, or in some cases, for a specific alternate function determined by the on-chip
hardware.
The high voltage FMS7401 device’s G0/T1HS1 and G5/T1HS2 output port levels can be as high as the Vdd supply voltage if
powered from the Vdd pin, (see Figure 15). The FMS7401L device’s G0/T1HS1 and G5/T1HS2 output port levels can be only
as high as the Vcc supply voltage since it is a low voltage device. All the other output ports for both the low and high voltage
devices are supplied by the Vcc pin (see Figure 15).
Figure 14. PORTGD Logic Diagram
GXPULLEN
GXBUFEN
GXOUT
GX
GXIN
VDD
VCC
Voltage
Regulator
(3.3V)
Figure 15. Output Port Configurations
VDD
VCC
Voltage
Regulator
(3.3V)
ACE
CORE
Outputs
T1HS1/G0
&
T1HS2/G5
ACE
CORE
Outputs
G1, G2, G3
G4, G6 & G7
For the FMS7401L device, VDD and VCC are internally connected.
8.1 I/O Registers
The I/O pins (G0–G7) have three memory mapped port registers associated with the I/O circuitry: a Port Configuration
(PORTGC), Port Data (PORTGD) and Port Input (PORTGP) register.¹ PORTGC is used to configure the pins as inputs or out-
puts. A pin may be configured as an input by writing a 0 or as an output by writing a 1 to its corresponding PORTGC bit. If a
pin is configured as an output, its PORTGD bit represents the state of the pin (1 = logic high, 0 = logic low). If the pin is con-
figured as an input, its PORTGD bit selects whether the pin is a weak pull-up or a high-impedance input. Table 20 provides
REV. 1.0.2 6/23/04
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