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| M14D1G1664A-2S Datasheet, PDF (64/65 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle | |||
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ESMT
(Preliminary)
Revision History
Revision
0.1
Date
2014.07.18
Original
M14D1G1664A (2S)
Automotive Grade
Description
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2014
Revision : 0.1
64/65
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