M14D1G1664A-2S Datasheet, PDF (2/65 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
(Preliminary)
M14D1G1664A (2S)
Automotive Grade
Ordering Information:
Product ID
Max Freq.
Automotive range (V): -40℃ to +95℃
M14D1G1664A -1.8BVG2S
M14D1G1664A -2.5BVG2S
533MHz
400MHz
VDD
1.8V
1.8V
Data Rate
(CL-tRCD-tRP)
DDR2-1066 (6-6-6)
DDR2-800 (5-5-5)
Package
Comments
84 ball BGA
Pb-free
Functional Block Diagram
CLK
CLK
CKE
Clock
Generator
Address
Mode Register &
Extended Mode
Register
Row
Address
Buffer
&
Refresh
Counter
CS
RAS
CAS
WE
Column
Address
Buffer
&
Refresh
Counter
Bank H
Bank B
Bank A
Sense Amplifier
Column Decoder
Data Control Circuit
DQS, DQS
DM
DQ
CLK, CLK
DLL
ODT
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2014
Revision : 0.1
2/65