M14D1G1664A-2S Datasheet, PDF (19/65 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
(Preliminary)
M14D1G1664A (2S)
Automotive Grade
Clock Jitter [ DDR2- 1066, 800 ]
Parameter
Symbol
-1.8
Min. Max.
-2.5
Min. Max.
Unit
Average clock period
Clock period jitter
Clock period jitter during
DLL locking period
t_CK (avg)
t_JIT (per)
t_JIT (per,lck)
1875 7500 2500 8000
ps
-90
90
-100
100
ps
-80
80
-80
80
ps
Cycle to cycle period jitter
Cycle to cycle clock period jitter
During DLL locking period
t_JIT (cc)
t_JIT (cc, lck)
-180
180
-200
200
ps
-160
160
-160
160
ps
Cumulative error across 2 cycles t_ERR (2per)
-132
132
-150
150
ps
Cumulative error across 3 cycles t_ERR (3per)
-157
157
-175
175
ps
Cumulative error across 4 cycles t_ERR (4per)
-175
175
-200
200
ps
Cumulative error across 5 cycles t_ERR (5per)
-188
188
-200
200
ps
Cumulative error across
n=6,7,8,9,10 cycles
t_ERR (6-10per)
-250
250
-300
300
ps
Cumulative error across
n=11,12,….49,50 cycles
t_ERR (11-50per) -425
425
-450
450
ps
Average high pulse width
t_CH (avg)
0.48
0.52
0.48
0.52 t_CK (avg)
Average low pulse width
t_CL (avg)
0.48
0.52
0.48
0.52 t_CK (avg)
Duty cycle jitter
t_JIT (duty)
-75
75
-100
100
ps
Note:
1. t_CK (avg) is calculated as the average clock period across any consecutive 200 cycle window.
Note
1
5
5
6
6
7
7
7
7
7
7
2
3
4
2. t_CH (avg) is defined as the average HIGH pulse width, as calculated across any consecutive 200 HIGH pulses.
3. t_CL (avg) is defined as the average LOW pulse width, as calculated across any consecutive 200 LOW pulses.
4. t_JIT (duty) is defined as the cumulative set of t_CH jitter and t_CL jitter. t_CH jitter is the largest deviation of any single t_CH from t_CH
(avg). t_CL jitter is the largest deviation of any single t_CL from t_CL (avg).
t_JIT (duty) is not subject to production test.
t_JIT (duty) = Min./Max. of { t_JIT (CH), t_JIT (CL)}, where:
t_JIT (CH) = { t_CH j - t_CH (avg) where j =1 to 200}
t_JIT (CL) = {t_CL j - t_CL (avg) where j =1 to 200}
5. t_JIT (per) is defined as the largest deviation of any single t_CK from t_CK (avg).
t_JIT (per) = Min./Max. of { t_CK j - t_CK (avg) where j =1 to 200}
t_JIT (per) defines the single period jitter when the DLL is already locked.
t_JIT (per, lck) uses the same definition for single period jitter, during the DLL locking period only.
t_JIT (per) and t_JIT (per, lck) are not subject to production testing.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2014
Revision : 0.1
19/65