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M14D2561616A-2E Datasheet, PDF (21/61 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle
ESMT
M14D2561616A (2E)
Automotive Grade
Slew Rate Definition Tangent
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2014
Revision : 1.0
21/61