M14D2561616A-2E Datasheet, PDF (19/61 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
M14D2561616A (2E)
Automotive Grade
De-rating Value of tDS/tDH with Differential DQS (DDR2- 1066, 800)
DQS, DQS differential slew rate
4.0 V/ns
Δt_DS Δt_DH
3.0 V/ns
Δt_DS Δt_DH
2.0 V/ns
Δt_DS Δt_DH
1.8 V/ns
Δt_DS Δt_DH
1.6 V/ns
Δt_DS Δt_DH
1.4 V/ns
Δt_DS Δt_DH
1.2 V/ns
Δt_DS Δt_DH
1.0 V/ns
Δt_DS Δt_DH
0.8 V/ns
Δt_DS Δt_DH
Unit
2.0 +100 +45 +100 +45 +100 +45 -
-
-
-
-
-
-
-
-
-
-
- ps
1.5 +67 +21 +67 +21 +67 +21 +79 +33 -
-
-
-
-
-
-
-
-
- ps
1.0 0
0
0
0
0
0 +12 +12 +24 +24 -
-
-
-
-
-
-
- ps
0.9 -
-
-5 -14 -5 -14 +7 -2 +19 +10 +31 +22 -
-
-
-
-
- ps
0.8 -
-
-
- -13 -31 -1 -19 +11 -7 +23 +5 +35 +17 -
-
-
- ps
0.7 -
-
-
-
-
- -10 -42 +2 -30 +14 -18 +26 -6 +38 +6 -
- ps
0.6 -
-
-
-
-
-
-
- -10 -59 +2 -47 +14 -35 +26 -23 +38 -11 ps
0.5 -
-
-
-
-
-
-
-
-
- -24 -89 -12 -77 0 -65 +12 -53 ps
0.4 -
-
-
-
-
-
-
-
-
-
-
- -52 -140 -40 -128 -28 -116 ps
De-rating Value of tIS/tIH (DDR2- 1066, 800)
CLK, CLK differential slew rate
2.0 V/ns
Δt_IS
Δt_IH
1.5 V/ns
Δt_IS
Δt_IH
1.0 V/ns
Δt_IS
Δt_IH
Unit
4.0
+150
+94
+180
+124
+210
+154
ps
3.5
+143
+89
+173
+119
+203
+149
ps
3.0
+133
+83
+163
+113
+193
+143
ps
2.5
+120
+75
+150
+105
+180
+135
ps
2.0
+100
+45
+130
+75
+160
+105
ps
1.5
+67
+21
+97
+51
+127
+81
ps
1.0
0
0
+30
+30
+60
+60
ps
0.9
-5
-14
+25
+16
+55
+46
ps
0.8
-13
-31
+17
-1
+47
+29
ps
0.7
-22
-54
+8
-24
+38
+6
ps
0.6
-34
-83
-4
-53
+26
-23
ps
0.5
-60
-125
-30
-95
0
-65
ps
0.4
-100
-188
-70
-158
-40
-128
ps
0.3
-168
-292
-138
-262
-108
-232
ps
0.25
-200
-375
-170
-345
-140
-315
ps
0.2
-325
-500
-295
-470
-265
-440
ps
0.15
-517
-708
-487
-678
-457
-648
ps
0.1
-1000
-1125
-970
-1095
-940
-1065
ps
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2014
Revision : 1.0
19/61