M-G362 Datasheet, PDF (49/69 Pages) Epson Company – IMU (Inertial Measurement Unit)

7.10 SIG_CTRL Register (Window 1)
Addr
(Hex)
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
R/W
0x01
ND_EN ND_EN ND_EN ND_EN ND_EN ND_EN ND_EN
(Temp) (XGyro) (YGyro) (ZGyro) (XACCL) (YACCL) (ZACCL)
-
R/W
Addr
(Hex)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
POL
POL
POL
POL
POL
POL
0x00
-
_CTRL _CTRL _CTRL _CTRL _CTRL _CTRL
-
R/W
(XGyro) (YGyro) (ZGyro) (XACCL) (YACCL) (ZACCL)
bit[15:9] ND_EN
Enables or disables the ND flags in FLAG [0x06(W0)] bit [15:9].
1 :Enable
0 :Disable
bit[6:1]
POL_CTRL
Specifies whether to bitwise invert the output value of the following registers: angular rate
(XGYRO, YGYRO, ZGYRO) and acceleration (XACCL, YACCL, ZACCL).
1 :Inverted
0 :Not inverted
7.11 MSC_CTRL Register (Window 1)
Addr
(Hex)
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
0x03
-
-
-
-
FLASH
_TEST
SELF
_TEST
-
Bit8
R/W
-
R/W
Addr
(Hex)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
0x02
EXT
_SEL
EXT
_POL
-
-
DRDY
_ON
DRDY
_POL
-
R/W
NOTE: The FLASH_TEST, and SELF_TEST functions can not be executed at the same time.
When executing them in succession, confirm the execution of the previous command is finished by
waiting until the bit changes from “1” to “0” and then execute the next command.
bit[11]
FLASH_TEST
Write “1” to execute the data consistency test for the non-volatile memory. The read value of the
bit is “1” during the test and “0” after the test is completed. After writing “1” to this bit, wait until
this bit goes back to “0” and then read the FLASH_ERR of DIAG_STAT [0x04(W0)] bit 2 to check
the result.
bit[10]
SELF_TEST
Write “1” to execute the self test to check if the gyroscope and the accelerometer are working
properly. The read value of the bit is “1” during the test and “0” after the test is completed. After
writing “1” to this bit, wait until this bit goes back to “0” and then read the ST_ERR_ALL of
DIAG_STAT [0x04(W0)] bit 1 to check the results.
bit[7:6]
EXT_SEL
These bits select the function of GPIO2 terminal to be GPIO2, External Counter Reset Input, or
External Trigger Input.
00 :GPIO2
01: External Counter Reset Input
M-G362PDC1 Data Sheet
Seiko Epson Corporation
45
Rev.20131217