PD45128441-I Datasheet, PDF (85/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

14. Package Drawing
µPD45128441-I, 45128841-I, 45128163-I
54-PIN PLASTIC TSOP (II) (10.16 mm (400))
54
28
detail of lead end
F
1
A
G
C
D
MM
NS
27
S
P
E
H
I
J
L
B
K
NOTES
1. Each lead centerline is located within 0.13 mm of
its true position (T.P.) at maximum material condition.
2. Dimension "A" does not include mold fiash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15 mm per side.
ITEM
A
B
C
D
E
F
G
H
I
J
K
L
M
N
P
MILLIMETERS
22.22±0.05
0.91 MAX.
0.80 (T.P.)
0.32^{+−00..0087}
0.10±0.05
1.1±0.1
1.00
11.76±0.20
10.16±0.10
0.80±0.20
0.145^{+−00..002155}
0.50±0.10
0.13
0.10
3°+−^73°°
S54G5-80-9JF-2
Preliminary Data Sheet E0233N10
85