PD45128441-I Datasheet, PDF (42/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

µPD45128441-I, 45128841-I, 45128163-I
13.3 Relationship between Frequency and Latency
Speed version
Clock cycle time [ns]
Frequency [MHz]
/CAS latency
[tRCD]
/RAS latency (/CAS latency + [tRCD])
[tRC]
[tRC1]
[tRAS]
[tRRD]
[tRP]
[tDPL]
[tDAL]
[tRSC]
- 75
7.5
10
133
100
3
2
3
2
6
4
9
7
9
7
6
5
2
2
3
2
2
2
4
3
2
2
- 80
8
10
125
100
3
2
3
2
6
4
9
7
9
7
6
5
2
2
3
2
2
2
4
3
2
2
- 10
10
13
100
77
3
2
2
2
5
4
7
6
8
6
5
4
2
2
2
2
2
2
3
3
2
2
42
Preliminary Data Sheet E0233N10