PD45128441-I Datasheet, PDF (76/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Byte Write Operation (Burst Length = 4, /CAS Latency = 3)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21
CLK
CKE
/CS
/RAS
/CAS
/WE
BA0
BA1
A10
ADD
LDQM
UDQM
DQ
(lower)
DQ
(upper)
Activate
Command
for Bank D
Read
Command
for Bank D
Upper
Byte
not Read
Lower
Byte
not Read
Lower
Byte
not Write
Upper
Byte
not Write
Lower
Byte
not Write
Read
Command
for Bank D
Lower
Byte
not Read
Lower
Byte
not Read