PD45128441-I Datasheet, PDF (17/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

µPD45128441-I, 45128841-I, 45128163-I
Current state
Read with auto
precharge
Write with auto
precharge
Precharging
Row activating
/CS /RAS /CAS /WE
H× × ×
L HHH
L HH L
LHLH
LHL L
L LHH
L LHL
L L LH
LLLL
Address
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
Op-Code
Command
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
(2/3)
Action
Notes
Continue burst to end → Precharging
Continue burst to end → Precharging
ILLEGAL
ILLEGAL
3
ILLEGAL
3
ILLEGAL
3
ILLEGAL
3
ILLEGAL
ILLEGAL
H × × ××
DESL
Continue burst to end → Write
recovering with auto precharge
L H H H×
NOP
Continue burst to end → Write
recovering with auto precharge
L H H L×
BST
ILLEGAL
L H L H BA, CA, A10 READ/READA ILLEGAL
3
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL
3
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL
ILLEGAL
3
L L L H×
REF/SELF
ILLEGAL
L L L L Op-Code
MRS
ILLEGAL
H × × ××
DESL
Nop → Enter idle after tRP
L H H H×
NOP
Nop → Enter idle after tRP
L H H L×
BST
ILLEGAL
L H L H BA, CA, A10 READ/READA ILLEGAL
3
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL
3
L L H H BA, RA
ACT
ILLEGAL
3
L L H L BA, A10
PRE/PALL
Nop → Enter idle after tRP
L L L H×
REF/SELF
ILLEGAL
L L L L Op-Code
MRS
ILLEGAL
H × × ××
DESL
Nop → Enter bank active after tRCD
L H H H×
NOP
Nop → Enter bank active after tRCD
L H H L×
BST
ILLEGAL
L H L H BA, CA, A10 READ/READA ILLEGAL
3
L H L L BA, CA, A10 WRIT/WRITA ILLEGAL
3
L L H H BA, RA
ACT
ILLEGAL
3, 10
L L H L BA, A10
PRE/PALL
ILLEGAL
3
L L L H×
REF/SELF
ILLEGAL
L L L L Op-Code
MRS
ILLEGAL
Preliminary Data Sheet E0233N10
17