PD45128441-I Datasheet, PDF (80/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Full Page Random Column Read (Burst Length = Full Page, /CAS Latency = 3)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21
CLK
CKE
H
/CS
/RAS
/CAS
/WE
BA0
BA1
A10
RAa
RDa
ADD
RAa
RDa CAa CDa CAb
CDb
CAc
CDc
DQM
DQ
L
Hi-Z
QAa1 QDa1 QAb1 QAb2 QDb1 QDb2 QAc1 QAc2 QAc3 QDc1 QDc2 QDc3
Hi-Z
Activate
Command
for Bank A
Activate
Command
for Bank D
Read
Command
for Bank A
Read
Command
for Bank A
Read
Command
for Bank D
Read
Command
for Bank D
Read
Command
for Bank A
Read
Command
for Bank D
Precharge
Command
for Bank D
(PRE Termination of Burst)