PD45128441-I Datasheet, PDF (5/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

µPD45128441-I, 45128841-I, 45128163-I
[µPD45128841]
54-pin Plastic TSOP (II) (10.16mm (400))
4M words × 8 bits × 4 banks
VCC
1
DQ0
2
VCCQ
3
NC
4
DQ1
5
VSSQ
6
NC
7
DQ2
8
VCCQ
9
NC
10
DQ3
11
VSSQ
12
NC
13
VCC
14
NC
15
/WE
16
/CAS
17
/RAS
18
/CS
19
BA0(A13)
20
BA1(A12)
21
A10
22
A0
23
A1
24
A2
25
A3
26
VCC
27
54
Vss
53
DQ7
52
VssQ
51
NC
50
DQ6
49
VccQ
48
NC
47
DQ5
46
VssQ
45
NC
44
DQ4
43
VccQ
42
NC
41
Vss
40
NC
39
DQM
38
CLK
37
CKE
36
NC
35
A11
34
A9
33
A8
32
A7
31
A6
30
A5
29
A4
28
Vss
A0 to A11 ^Note
: Address inputs
BA0(A13), BA1(A12): Bank select
DQ0 to DQ7
: Data inputs / outputs
CLK
: Clock input
CKE
: Clock enable
/CS
: Chip select
/RAS
: Row address strobe
/CAS
: Column address strobe
/WE
: Write enable
DQM
: DQ mask enable
VCC
: Supply voltage
VSS
: Ground
VCCQ
: Supply voltage for DQ
VSSQ
: Ground for DQ
NC
: No connection
Note A0 to A11 : Row address inputs
A0 to A9 : Column address inputs
Preliminary Data Sheet E0233N10
5