PD45128441-I Datasheet, PDF (15/89 Pages) Elpida Memory – 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

µPD45128441-I, 45128841-I, 45128163-I
4. Truth Table
4.1 Command Truth Table
Function
Device deselect
No operation
Burst stop
Read
Read with auto precharge
Write
Write with auto precharge
Bank activate
Precharge select bank
Precharge all banks
Mode register set
Symbol
DESL
NOP
BST
READ
READA
WRIT
WRITA
ACT
PRE
PALL
MRS
CKE
n–1
n
H
×
H
×
H
×
H
×
H
×
H
×
H
×
H
×
H
×
H
×
H
×
/CS /RAS /CAS /WE BA1,
BA0
H
×
×
×
×
L
H
H
H
×
L
H
H
L
×
L
H
L
H
V
L
H
L
H
V
L
H
L
L
V
L
H
L
L
V
L
L
H
H
V
L
L
H
L
V
L
L
H
L
×
L
L
L
L
L
Remark H = High level, L = Low level, × = High or Low level (Don't care), V = Valid data input
A10 A11,
A9 - A0
×
×
×
×
×
×
L
V
H
V
L
V
H
V
V
V
L
×
H
×
L
V
4.2 DQM Truth Table
Function
Data write / output enable
Data mask / output disable
Upper byte write enable / output enable
Lower byte write enable / output enable
Upper byte write inhibit / output disable
Lower byte write inhibit / output disable
Symbol
ENB
MASK
ENBU
ENBL
MASKU
MASKL
CKE
n–1
n
H
×
H
×
H
×
H
×
H
×
H
×
DQM
U
L
L
H
L
×
×
L
H
×
×
H
Remark H = High level, L = Low level, × = High or Low level (Don't care)
4.3 CKE Truth Table
Current state
Activating
Any
Clock suspend
Idle
Idle
Self refresh
Idle
Power down
Function
Symbol
Clock suspend mode entry
Clock suspend mode
Clock suspend mode exit
CBR (auto) refresh command
Self refresh entry
Self refresh exit
REF
SELF
Power down entry
Power down exit
CKE
n–1
n
H
L
L
L
L
H
H
H
H
L
L
H
L
H
H
L
L
H
L
H
/CS /RAS /CAS /WE Address
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
L
L
L
H
×
L
L
L
H
×
L
H
H
H
×
H
×
×
×
×
×
×
×
×
×
H
×
×
×
×
L
H
H
H
×
Remark H = High level, L = Low level, × = High or Low level (Don't care)
Preliminary Data Sheet E0233N10
15