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S6E1C3 Datasheet, PDF (89/107 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M0+ FM0+ Microcontroller | |||
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S6E1C3 Series
TxD+
Full-speed buffer
Rs
28 ⦠to 44 ⦠equivalent impedance
TxD-
3-state enable
Rs
28 ⦠to 44 ⦠equivalent impedance
Mount it as external resistance.
Rs series resistor 25 ⦠to 30 â¦
Series resistor of 27 ⦠(recommendation value) must be added.
And, use âresistance with an uncertainty of 5% by E24 sequenceâ.
*7 : They indicate rising time (Trise) and falling time (Tfall) of the low-speed differential data signal.
They are defined by the time between 10% and 90% of the output signal voltage.
D+
90%
90%
10%
D-
Trise
Rising time
10%
Tfall
Falling time
See âLow-speed load (Compliance Load)â for condition of external load.
Document Number: 002-00233 Rev.*B
Page 89 of 107
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