S6E1C3 Datasheet, PDF (6/107 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M0+ FM0+ Microcontroller

S6E1C3 Series
1. Product Lineup
Memory Size
Product name
On-chip Flash memory
On-chip SRAM
S6E1C31B0A/
S6E1C31C0A/
S6E1C31D0A
64 Kbytes
12 Kbytes
S6E1C32B0A/
S6E1C32C0A/
S6E1C32D0A
128 Kbytes
16 Kbytes
Function
Product name
Pin count
CPU
Frequency
Power supply voltage range
USB2.0 (Device/Host)
DSTC
Multi-function Serial Interface
(UART/CSIO/I²C/I2S)
Base Timer
(PWC/Reload timer/PWM/PPG)
Dual Timer
HDMI-CEC/ Remote Control
Receiver
S6E1C32B0A
(WLCSP)
S6E1C32B0A/
S6E1C31B0A
S6E1C32C0A/
S6E1C32C0A
TBD
32
48
Cortex-M0+
40.8 MHz
1.65 V to 3.6 V
1 unit
64 ch.
2 ch. (Max)
Ch.0/3 without
FIFO
4 ch. (Max)
Ch.0/1/3 without
FIFO
Ch. 6 with FIFO
6 ch. (Max)
Ch.0/1/3 without
FIFO
Ch.4/6/7 with
FIFO
I2S : No
I2S : 1 ch (Max)
Ch. 6 with FIFO
8 ch. (Max)
S6E1C31D0A/
S6E1C32D0A
64
6 ch. (Max)
Ch.0/1/3 without
FIFO
Ch.4/6/7 with
FIFO
I2S : 2 ch (Max)
Ch. 4/6 with FIFO
1 ch.(Max)
Ch.1
1 unit
2 ch (Max)
Ch.0/1
I2C Slave
No
1 ch (Max)
Smart Card Interface
Real-time Clock
Watch Counter
CRC Accelerator
Watchdog timer
External Interrupt
I/O port
12-bit A/D converter
CSV (Clock Supervisor)
LVD (Low-voltage Detection)
Built-in CR
High-speed
Low-speed
Debug Function
Unique ID
5 pins (Max),
NMI × 1
20 pins (Max)
4 ch (1 unit)
No
1 unit
1 unit
Yes
1 ch. (SW) + 1 ch. (HW)
7 pins (Max),
9 pins (Max),
NMI x 1
NMI x 1
24 pins (Max)
38 pins (Max)
6 ch. (1 unit)
8 ch. (1 unit)
Yes
2 ch.
8 MHz (Typ)
100 kHz (Typ)
SW-DP
Yes
1 ch (Max)
12 pins (Max),
NMI x 1
54 pins (Max)
8 ch. (1 unit)
Note:
− All signals of the peripheral function in each product cannot be allocated by limiting the pins of package. It is necessary to use
the port relocate function of the I/O port according to your function use.
See "11. Electrical Characteristics 11.4 AC Characteristics 11.4.3 Built-in CR Oscillation Characteristics" for accuracy of built-in
CR.
Document Number: 002-00233 Rev.*B
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