S6E1C3 Datasheet, PDF (63/107 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M0+ FM0+ Microcontroller

S6E1C3 Series
CSIO (SPI=0, SCINV=1)
Parameter
Serial clock cycle time
SCK ↑ → SOT delay time
SIN → SCK ↓ setup time
SCK ↓ → SIN hold time
Serial clock "L" pulse width
Serial clock "H" pulse width
SCK ↑ → SOT delay time
SIN → SCK ↓ setup time
SCK ↓ → SIN hold time
SCK falling time
SCK rising time
Symbol
tSCYC
tSHOVI
tIVSLI
tSLIXI
tSLSH
tSHSL
tSHOVE
tIVSLE
tSLIXE
tF
tR
Pin
name
SCKx
SCKx,
SOTx
SCKx,
SINx
SCKx,
SINx
SCKx
SCKx
SCKx,
SOTx
SCKx,
SINx
SCKx,
SINx
SCKx
SCKx
Conditions
Master mode
Slave mode
(VCC= 1.65 V to 3.6 V, VSS= 0 V, TA=- 40°C to +105°C)
VCC < 2.7V
Min
Max
VCC ≥ 2.7V
Min
Max
Unit
4 tCYCP
-
4 tCYCP
-
ns
- 30
+ 30
- 20
+ 20 ns
50
-
36
-
ns
0
-
0
-
ns
2 tCYCP -
10
-
2 tCYCP -
10
-
ns
tCYCP + 10
-
tCYCP + 10
-
ns
-
50
-
33
ns
10
-
10
-
ns
20
-
20
-
ns
-
5
-
5
ns
-
5
-
5
ns
Notes:
− The above AC characteristics are for clock synchronous mode.
− tCYCP represents the APB bus clock cycle time.
For the number of the APB bus to which Multi-function Serial has been connected, see "8. Block Diagram".
− The characteristics are only applicable when the relocate port numbers are the same.
For instance, they are not applicable for the combination of SCKx_0 and SOTx_1.
− External load capacitance CL=30 pF
Document Number: 002-00233 Rev.*B
Page 63 of 107