S6E1C3 Datasheet, PDF (88/107 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M0+ FM0+ Microcontroller

S6E1C3 Series
(to the VSS and 1.5 kΩ load) at high-state (VOH)
*4 : The cross voltage of the external differential output signal (D+ / D-) of USB I/O buffer is within 1.3 V to 2.0 V.
D+
Max 2.0V
Min 1.3V
D-
VCRS specified range
*5 : The indicate rising time (Trise) and falling time (Tfall) of the full-speed differential data signal.
They are defined by the time between 10% and 90% of the output signal voltage.
For full-speed buffer, Tr/Tf ratio is regulated as within ±10% to minimize RFI emission.
D+
90%
90%
10%
D-
Trise
Rising time
10%
Tfall
Falling time
TxD+
Full-speed buffer
Rs=27 Ω
TxD-
3-state enable
Rs=27 Ω
CL=50 pF
CL=50 pF
*6 : USB Full-speed connection is performed via twist pair cable shield with 90 Ω ± 15% characteristic impedance (Differential
Mode).
USB standard defines that output impedance of USB driver must be in range from 28Ω to 44Ω. So, discrete series resistor
(Rs) addition is defined in order to satisfy the above definition and keep balance.
When using this USB I/O, use it with 25 Ω to 33 Ω (recommendation value : 27 Ω) series resistor Rs.
Document Number: 002-00233 Rev.*B
Page 88 of 107