S6E1C3 Datasheet, PDF (55/107 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M0+ FM0+ Microcontroller

S6E1C3 Series
11.4 AC Characteristics
11.4.1 Main Clock Input Characteristics
(VCC= 1.65 V to 3.6 V, VSS= 0 V, TA=- 40°C to +105°C)
Parameter
Symbol
Pin
name
Conditions
Value
Min
Max
Unit
Remarks
Input frequency
Input clock cycle
FCH
tCYLH
VCC ≥ 2.7V
8
VCC < 2.7V
8
48
20
MHz
When the crystal
oscillator is connected
-
8
48
MHz
When the external
clock is used
X0,
X1
-
20.83
125
ns
When the external
clock is used
Input clock pulse
width
-
Input clock rising
tCF,
time and falling time
tCR
FCM
PWH/tCYLH,
PWL/tCYLH
45
55
%
When the external
clock is used
-
-
5
ns
When the external
clock is used
-
-
-
40.8
MHz Master clock
Internal operating
FCC
-
-
clock^*1 frequency
FCP0
-
-
FCP1
-
-
-
40.8
MHz Base clock (HCLK/FCLK)
-
40.8
MHz APB0 bus clock*²
-
40.8
MHz APB1 bus clock*²
tCYCCM
-
-
24.5
-
ns Master clock
Internal operating
tCYCC
-
clock^*1 cycle time
tCYCP0
-
tCYCP1
-
-
24.5
-
ns Base clock (HCLK/FCLK)
-
24.5
-
ns APB0 bus clock*²
-
24.5
-
ns APB1 bus clock*²
*1: For details of each internal operating clock, refer to "Chapter: Clock" in "FM0+ Family Peripheral Manual".
*2: For details of the APB bus to which a peripheral is connected, see "8. Block Diagram".
0.8 × Vcc
X0
tCYLH
0.8 × Vcc
0.2 × Vcc
0.8 × Vcc
0.2 × Vcc
PWH
PWL
tCF
tCR
Document Number: 002-00233 Rev.*B
Page 55 of 107