S6E1C3 Datasheet, PDF (43/107 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M0+ FM0+ Microcontroller

Peripheral Address Map
Start address
End address
0x4000_0000
0x4000_0FFF
0x4000_1000
0x4000_FFFF
0x4001_0000
0x4001_0FFF
0x4001_1000
0x4001_1FFF
0x4001_2000
0x4001_2FFF
0x4001_3000
0x4001_4FFF
0x4001_5000
0x4001_5FFF
0x4001_6000
0x4001_FFFF
0x4002_0000
0x4002_0FFF
0x4002_1000
0x4002_3FFF
0x4002_4000
0x4002_4FFF
0x4002_5000
0x4002_5FFF
0x4002_6000
0x4002_6FFF
0x4002_7000
0x4002_7FFF
0x4002_8000
0x4002_DFFF
0x4002_E000
0x4002_EFFF
0x4002_F000
0x4002_FFFF
0x4003_0000
0x4003_0FFF
0x4003_1000
0x4003_1FFF
0x4003_2000
0x4003_2FFF
0x4003_3000
0x4003_3FFF
0x4003_4000
0x4003_5000
0x4003_6000
0x4003_7000
0x4003_4FFF
0x4003_5FFF
0x4003_6FFF
0x4003_77FF
0x4003_7800
0x4003_79FF
0x4003_7A00
0x4003_7FFF
0x4003_8000
0x4003_8FFF
0x4003_9000
0x4003_9FFF
0x4003_A000
0x4003_AFFF
0x4003_B000
0x4003_BFFF
0x4003_C000
0x4003_C0FF
0x4003_C100
0x4003_C800
0x4003_C900
0x4003_CA00
0x4003_CB00
0x4004_0000
0x4005_0000
0x4006_1000
0x4006_2000
0x4003_C7FF
0x4003_C8FF
0x4003_C9FF
0x4003_CAFF
0x4003_FFFF
0x4004_FFFF
0x4006_0FFF
0x4006_1FFF
0x41FF_FFFF
S6E1C3 Series
Bus
AHB
APB0
APB1
AHB
Peripheral
Flash memory I/F register
Reserved
Clock/Reset Control
Hardware Watchdog Timer
Software Watchdog Timer
Reserved
Dual-Timer
Reserved
Reserved
Reserved
Reserved
Base Timer
Reserved
A/D Converter
Reserved
Built-in CR trimming
Reserved
External Interrupt Controller
Interrupt Request Batch-Read Function
Reserved
GPIO
HDMI-CEC/Remote Control Receiver
Low-Voltage Detection / DS mode / Vref Calibration
USB Clock Generator
Reserved
I2C Slave
Reserved
Multi-function Serial Interface
CRC
Watch Counter
Real-time clock
Low-speed CR Prescaler
Peripheral Clock Gating
Reserved
Smart Card Interface
MFS-I2S Clock Generator
Reserved
USB ch.0
Reserved
DSTC
Reserved
Document Number: 002-00233 Rev.*B
Page 43 of 107