S6J3350 Datasheet, PDF (227/249 Pages) Cypress Semiconductor – 32-bit Microcontroller Spansion® TraveoTM Family

PRELIMINARY
S6J3350 Series
Common timing between read and write
Parameter
Cycle time
(without MRDY)
Cycle time
(with MRDY)
CS delay time
Address delay
time
RDY setup time
Symbol
Pin Name
tCYC MCLK
tCYC MCLK
tCSO
tAO
tRDYS
MCLK,
MCSX0 to MCSX3
MCLK,
MAD00 to MAD23
MCLK, MRDY
RDY hold time
tRDYH MCLK, MRDY
Notes: This is target spec.
(TA: Recommended operating conditions, Vcc53=5.0 V ±10%, VSS=0.0 V)
(External load capacitance 16pF)
Conditions
Value
Min Max
Unit
Remarks
62.5
-
ns
If using
2mA is selected in
ODR bit in
62.5
-
PPC_PCFGR
register.
MRDY, set
ns
MCLK to
20MHz or
less.
0.5
18
ns
0.5
18
ns
"CMOS Schmitt
21
-
ns
input" and "Disable
noise filter" are
selected in
0
-
ns
PPC_PCFGR
register.
− External bus I/F common timing
−
Document Number: 002-10634 Rev.**
Page 227 of 249