S6J3350 Datasheet, PDF(148/249 Page) Cypress Semiconductor – 32-bit Microcontroller Spansion® TraveoTM Family

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S6J3350 Datasheet, PDF (148/249 Pages) Cypress Semiconductor – 32-bit Microcontroller Spansion® TraveoTM Family

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PRELIMINARY

S6J3350 Series

RESSEL Source for Resource input

Register

(Offset)

Resource

[3:0]

/PORT

0

1

2

3

4

5

6

7

SEL[3:0] 8

9

10

11

12

13

14

15

RESSEL

(0-7)

-

-

-

-

-

-

-

-

RIC_RE

SIN638

RXCLK

RESSEL

(8-15)

-

-

-

-

-

-

-

-

(0x04FC)

PORTSE

L (0-7)

P0_17

P4_00

-

-

-

-

-

-

PORTSE

L (8-15)

-

-

-

-

-

-

-

-

RESSEL

(0-7)

-

-

-

-

-

-

-

-

RIC_RE

RESSEL

(8-15)

-

-

-

-

-

-

-

-

SIN639 TXCLK

(0x04FE)

PORTSE

L (0-7)

P0_20

P4_03

-

-

-

-

-

-

PORTSE

L (8-15)

-

-

-

-

-

-

-

-

RESSEL

(0-7)

-

-

-

-

-

-

-

-

RIC_RE

SIN685

(0x055A)

ADTRG0

RESSEL

(8-15)

PORTSE

L (0-7)

-

P1_16

-

P2_10

-

-

-

-

-

-

-

-

-

-

-

-

PORTSE

L (8-15)

-

-

-

-

-

-

-

-

RESSEL

(0-7)

-

-

-

-

-

-

-

-

RIC_RE

RESSEL

(8-15)

-

-

-

-

-

-

-

-

SIN686 ADTRG1

(0x055C)

PORTSE

L (0-7)

P4_22

P1_08

P2_11

-

-

-

-

-

PORTSE

L (8-15)

-

-

-

-

-

-

-

-

Notes:

â When both GPIO_PORTEN.GPORTEN and PPC_PCFGR.PIE are configured as 0, the input signal is disconnected and

external interrupt cannot be detected. During disconnecting, I/O internally outputs "low" to internal logic, and if ELVR is

configured as low-level-detection, falling-edge-detection, or both-edge-detection it will be detected as external interrupt with

EIRR=1.

â "Set 0" (Set 1) means that "0" ("1") is inputted.

â OCUx_MODn is described as MODn pin in TraveoTM Platform hardware manual.

Document Number: 002-10634 Rev.**

Page 148 of 249

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