S6J3350 Datasheet, PDF (180/249 Pages) Cypress Semiconductor – 32-bit Microcontroller Spansion® TraveoTM Family

PRELIMINARY
S6J3350 Series
9.1.4 AC characteristics
9.1.4.1 Source clock timing
Parameter
Source oscillation
clock frequency
Source oscillation
clock cycle time
CAN PLL jitter
(when locked)
Internal Slow CR
oscillation frequency
Internal Fast CR
oscillation frequency
Symbo
l
FC
tCYL
tPJ
FCRS
FCRF
Pin
name
(TA: Recommended operating conditions, Vcc5=5.0 V ±10%, VSS=DVSS=AVSS=0.0 V)
Conditions
Value
Min Typ Max
Unit
Remarks
X0, X1
-
3.6
-
4.0 MHz
X0, X1
-
250.0 - 277.8 ns
-
-
-10
-
10
ns
-
-
50 100 150 kHz
-
-
2.40 4.00 5.61- MHz
Before
trim
3.20 4.00 4.81 MHz After trim
Notes:
− The maximum/minimum values have been standardized with the main clock and PLL clock in use.
− Jitter of source oscillator must be smaller than 300ppm.
− X0 and X1 clock timing
tCYL
X0
CAN PLL jitter
A time difference from the ideal clock is guaranteed for each cycle period within 20,000 cycles.
Ideal clock
Slow
PLL output
t1
t2
t3
tn-1
tn
t3
t2
t1
tn-1
tn
Fast
Document Number: 002-10634 Rev.**
Page 180 of 249