SM55161A Datasheet, PDF (56/64 Pages) Austin Semiconductor – 262144 x 16 BIT VRAM MULTIPORT VIDEO RAM

Austin Semiconductor, Inc.
FIGURE 46: SERIAL-READ-CYCLE TIMING (SE\ = V_IL)
VRAM
SM55161A
Production
NOTES:
A. While the data is being read through the serial-data register, TRG\ is a don’t care; however, TRG\ must be held high when RAS\ goes low.
This is to avoid the initiation of a register-data transfer operation.
B. The serial data-out cycle is used to read data out of the data registers. Before data can be read via SQ, the device must be put into the
read mode by performing a transfer-read cycle.
FIGURE 47: SERIAL-WRITE-CYCLE TIMING
SMJ55161A
Rev. 1.6 03/05
56
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