ATMEGA8_08 Datasheet, PDF (39/308 Pages) ATMEL Corporation – 8-bit with 8K Bytes In-System Programmable Flash

Power-on Reset
ATmega8(L)
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in Table 15. The POR is activated whenever V_CC is below the detection level. The
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply
voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V_CC rise. The RESET signal is activated again, without any delay,
when V_CC decreases below the detection level.
Figure 15. MCU Start-up, RESET Tied to V_CC
V_CC
V_POT
RESET
V_RST
TIME-OUT
t_TOUT
INTERNAL
RESET
Figure 16. MCU Start-up, RESET Extended Externally
V_CC
V_POT
RESET
V_RST
TIME-OUT
t_TOUT
INTERNAL
RESET
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2486T–AVR–05/08