ATMEGA8_08 Datasheet, PDF (222/308 Pages) ATMEL Corporation – 8-bit with 8K Bytes In-System Programmable Flash

Memory
Programming
Program And Data The ATmega8 provides six Lock Bits which can be left unprogrammed (“1”) or can be pro-
Memory Lock Bits ^{grammed (“0”) to obtain the additional features listed in Table 86. The Lock Bits can only be}
erased to “1” with the Chip Erase command.
Table 85. Lock Bit Byte
Lock Bit Byte
Bit No. Description
Default Value⁽¹⁾
7
–
1 (unprogrammed)
6
–
1 (unprogrammed)
BLB12
5
Boot lock bit
1 (unprogrammed)
BLB11
4
Boot lock bit
1 (unprogrammed)
BLB02
3
Boot lock bit
1 (unprogrammed)
BLB01
2
Boot lock bit
1 (unprogrammed)
LB2
1
Lock bit
1 (unprogrammed)
LB1
0
Lock bit
1 (unprogrammed)
Note: 1. “1” means unprogrammed, “0” means programmed
Table 86. Lock Bit Protection Modes⁽²⁾
Memory Lock Bits
LB Mode
LB2
LB1
1
1
1
2
1
0
3
0
0
BLB0 Mode BLB02 BLB01
1
1
1
2
1
0
3
0
0
4
0
1
BLB1 Mode BLB12 BLB11
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse Bits are locked in both Serial and Parallel
Programming mode.⁽¹⁾
Further programming and verification of the Flash and
EEPROM is disabled in parallel and Serial Programming
mode. The Fuse Bits are locked in both Serial and Parallel
Programming modes.⁽¹⁾
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
222 ATmega8(L)
2486T–AVR–05/08