ATMEGA8_08 Datasheet, PDF (169/308 Pages) ATMEL Corporation – 8-bit with 8K Bytes In-System Programmable Flash

ATmega8(L)
Overview of the
TWI Module
The TWI module is comprised of several submodules, as shown in Figure 76. All registers drawn
in a thick line are accessible through the AVR data bus.
Figure 76. Overview of the TWI Module
SCL
Slew-rate
Control
Spike
Filter
SDA
Slew-rate Spike
Control
Filter
Bus Interface Unit
START / STOP
Control
Spike Suppression
Arbitration detection
Address/Data Shift
Register (TWDR)
Ack
Bit Rate Generator
Prescaler
Bit Rate Register
(TWBR)
Address Match Unit
Address Register
(TWAR)
Address Comparator
Control Unit
Status Register
(TWSR)
Control Register
(TWCR)
State Machine and
Status control
SCL and SDA Pins
These pins interface the AVR TWI with the rest of the MCU system. The output drivers contain a
slew-rate limiter in order to conform to the TWI specification. The input stages contain a spike
suppression unit removing spikes shorter than 50 ns. Note that the internal pull-ups in the AVR
pads can be enabled by setting the PORT bits corresponding to the SCL and SDA pins, as
explained in the I/O Port section. The internal pull-ups can in some systems eliminate the need
for external ones.
2486T–AVR–05/08
169