EPM240 Datasheet, PDF (77/86 Pages) Altera Corporation – JTAG & In-System Programmability

Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
5–19
Table 5–24 shows the external I/O timing parameters for EPM570 devices.
Table 5–24. EPM570 Global Clock External I/O Timing Parameters
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
Symbol
Parameter
Condition Min Max Min Max Min Max Min Max Min Max Unit
t_PD1
Worst case pin-to-pin 10 pF — 5.4 — 7.0 — 8.7 — 9.5 — 15.1 ns
delay through 1 look-
up table (LUT)
t_PD2
Best case pin-to-pin
10 pF — 3.7 — 4.8 — 5.9 — 5.7 — 7.7 ns
delay through 1 LUT
t_SU
Global clock setup
time
—
1.2 — 1.5 — 1.9 — 2.6 — 4.5 — ns
t_H
Global clock hold
time
—
0.0 — 0.0 — 0.0 — 0 — 0 — ns
t_CO
Global clock to
output delay
10 pF 2.0 4.5 2.0 5.8 2.0 7.1 2.0 6.1 2.0 7.6 ns
t_CH
Global clock high
time
—
166 — 216 — 266 — 253 — 335 — ps
t_CL
Global clock low time
—
166 — 216 — 266 — 253 — 335 — ps
t_CNT
Minimum global
clock period for
16-bit counter
—
3.3 — 4.0 — 5.0 — 5.4 — 8.1 — ns
f_CNT
Maximum global
clock frequency for
16-bit counter
—
— 304.0 — 247.5 — 201.1 — 184.1 — 123.5 MHz
(1)
Note to Table 5–24:
(1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global clock
input pin maximum frequency.
Table 5–25 shows the external I/O timing parameters for EPM1270 devices.
Table 5–25. EPM1270 Global Clock External I/O Timing Parameters (Part 1 of 2)
–3 Speed Grade –4 Speed Grade –5 Speed Grade
Symbol
Parameter
Condition Min
Max
Min Max Min Max Unit
t_PD1
Worst case pin-to-pin
10 pF
—
6.2
—
8.1
— 10.0 ns
delay through 1 look-up
table (LUT)
t_PD2
Best case pin-to-pin
10 pF
—
3.7
—
4.8
—
5.9
ns
delay through 1 LUT
t_SU
Global clock setup time
—
1.2
—
1.5
—
1.9
—
ns
t_H
Global clock hold time
—
0.0
—
0.0
—
0.0
—
ns
t_CO
Global clock to output
10 pF
2.0
4.6
2.0
5.9
2.0
7.3
ns
delay
t_CH
Global clock high time
—
166
—
216 — 266 —
ps
t_CL
Global clock low time
—
166
—
216 — 266 —
ps
© Novermber 2008 Altera Corporation
MAX II Device Handbook