AK4649 Datasheet, PDF (88/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK-AMP

[AK4649]
■ Speaker-amp Output
FS3-0 bits
0,000
(Addr:05H, D5&D2-0)
(1)
1,111
DACS bit
(Addr:02H, D3)
(2)
SPKG1-0 bits
(Addr:03H, D4-3)
ALC Control 1
(Addr:06H)
ALC Control 2
(Addr:0BH)
ALC Control 3
(Addr:07H)
OVL/R7-0 bits
(Addr:0AH&0DH, D7-0)
Digital Filter Path
(Addr:26H)
00
00H
(3)
(4)
01
3CH
28H
(5)
28H
00H
40H
(6)
91H
00H
(7)
(8)
91H
04H
ALC2 State
ALC2 Disable
ALC2 Enable
PMPFIL bit
PMDAC bit
(Addr:00H, D2)
PMBP bit
(Addr:00H, D5)
PMSPK bit
(Addr:00H, D4)
SPPSN bit
(Addr:02H, D7)
SPP pin
(9)
Hi-Z
(10)
(11)
Normal Output
(12)
ALC2 Disable
(13)
Hi-Z
SPN pin
Hi-Z
SVDD/2 Normal Output SVDD/2 Hi-Z
Figure 61. Speaker-Amp Output Sequence
Example:
PLL Master Mode
Audio I/F Format: MSB justified (ADC & DAC)
Sampling Frequency:44.1KHz
Digital Volume: 0dB
ALC2: Enable
(1) Addr:05H, Data:27H
(2) Addr:02H, Data:20H
(3) Addr:03H, Data:08H
(4) Addr:06H, Data:3CH
(5) Addr:0BH, Data:28H
(6) Addr:07H, Data:40H
(7) Addr:0AH & 0DH, Data:91H
(8) Addr:26H, Data:04H
(9) Addr:00H, Data:74H
(10) Addr:02H, Data:A0H
Playback
(11) Addr:02H, Data:20H
(12) Addr:02H, Data:00H
(13) Addr:00H, Data:40H
<Example>
At first, clocks must be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4649 is PLL mode, DAC and Speaker-Amp must be
powered-up in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up the path of “DAC → SPK-Amp”: DACS bit = “0” → “1”
(3) SPK-Amp gain setting: SPKG1-0 bits = “00” → “01”
(4) Set up Timer Select for ALC (Addr = 06H)
(5) Set up REF value for ALC, LMTH1 and RGAIN1 bits (Addr = 0BH)
(6) Set up LMTH0, RGAIN0, LMAT1-0, ALC2 bits (Addr = 07H)
(7) Set up the output digital volume (Addr = 0AH, 0DH).
When OVOLC bit is “1” (default), OVL7-0 bits set the volume of both channels. After DAC is powered-up, the
digital volume changes from default value (0dB) to the register setting value by the soft transition. When ALC2
bit = “0”, it could be digital volume control.
(8) Set up Programmable Filter Path (PFDAC, ADCPF and PFSDO bits) (Addr = 26H)
(9) Power up DAC, MIN-Amp, Programmable Filter and Speaker:
PMDAC = PMPFIL = PMBP = PMSPK bits = “0” → “1”
MS1023-E-01
- 88 -
2010/08