AK4649 Datasheet, PDF (28/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK-AMP

[AK4649]
b) PLL reference clock: BICK or LRCK pin
Sampling frequency corresponds to 7.35kHz to 48kHz by changing FS3-0 bits (Table 6).
AK4649
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
DSP or μP
32fs or 64fs
1fs
BCLK
LRCK
SDTI
SDTO
Figure 16. PLL Slave Mode 2 (PLL Reference Clock: BICK pin)
AK4649
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
≥ 32fs
1fs
DSP or μP
BCLK
LRCK
SDTI
SDTO
Figure 17 PLL Slave Mode 2 (PLL Reference Clock: LRCK pin)
The external clocks (MCKI, BICK and LRCK) must always be present whenever the ADC, DAC or Programmable Filter
is in operation (PMADL bit = “1”, PMADR bit = “1” PMDAC, or PMPFIL bit = “1”). If these clocks are not provided, the
AK4649 may draw excess current and it is not possible to operate properly because utilizes dynamic refreshed logic
internally. If the external clocks are not present, the ADC, DAC and Programmable Filter should be in the power-down
mode (PMADL=PMADR=PMDAC =PMPFIL bits = “0”).
MS1023-E-01
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2010/08